MHz to Hz: Crystal Clocks, Timer Ticks and Prescalers

Turning a Crystal's MHz Rating Into Countable Timer Ticks

A microcontroller datasheet advertises its clock in megahertz, but nothing inside the chip counts in megahertz. Timer registers, prescaler fields, baud-rate dividers and delay loops all work from the raw number of cycles per second, so the headline figure has to become a plain hertz count before you can size an auto-reload value or check a divider. Drop in the crystal or PLL output you are running from and carry the result into your timer arithmetic.

Conversion factor: multiply megahertz by 1 000 000. A 16 MHz crystal therefore clocks the core at 16 × 1 000 000 = 16 000 000 Hz, so a single cycle lasts 1 ÷ 16 000 000 = 62.5 ns and one millisecond holds exactly 16 000 of them.

What the raw count is used for

Every peripheral divides from the same root

Bus clocks, timer clocks, ADC clocks and serial clocks are all integer divisions of the core figure. Once you know the root in hertz, each divider stage is a simple division rather than a mental prefix juggle.

A tick has a length, not just a number

The reciprocal of the hertz count is the period of one increment. That single number decides whether an interrupt can fire often enough and whether a 16-bit counter will roll over before your interval elapses.

Tolerance is a fraction of the hertz figure

A crystal specified at ±20 ppm only means something once you know the nominal count. On a 16 MHz part that tolerance is ±320 Hz; on an 8 MHz part the same ppm figure is ±160 Hz.

From Datasheet Clock to Prescaler and Reload Value

Enter the clock the core actually runs at

Type the figure your oscillator or PLL produces — 8, 16, 48, 72 or 240 for the usual suspects. Fractional crystal values such as 14.7456 are accepted with either a dot or a comma, and any spaces you paste in are ignored.

Divide the hertz count down to your tick rate

Take the cycles-per-second result and divide by the prescaler you plan to select. At 16 000 000 Hz a prescaler of 16 leaves a 1 MHz timer clock, so a reload value of 999 counts out one millisecond exactly.

Copy the bare digits into your header

The copy control on each field hands you the number with no unit and no separators — exactly the form a clock-definition macro wants. Ctrl+C inside a field does the same.

Reverse it to audit a measured clock

Press the swap control, or type into the right-hand field, when a scope-measured figure in hertz needs a megahertz label to compare against the part you ordered.

Watch the display threshold: results of 10 000 000 000 and above switch to scientific notation. Every clock in the microcontroller range stays well under that limit and prints as full digits.

Clock Frequencies, Cycle Periods and Ticks Per Millisecond

These are the oscillator values you meet on real boards, with the two derived numbers firmware usually needs next: how long a single core cycle lasts, and how many cycles fit into one millisecond of wall time.

Clock rating	Cycles per second	One cycle	Cycles per millisecond
0.032768 MHz — watch crystal	32 768 Hz	30.518 µs	32.768
1 MHz — divided internal RC	1 000 000 Hz	1 000 ns	1 000
8 MHz — classic internal oscillator	8 000 000 Hz	125 ns	8 000
12 MHz — USB-friendly crystal	12 000 000 Hz	83.33 ns	12 000
14.7456 MHz — serial-exact crystal	14 745 600 Hz	67.82 ns	14 745.6
16 MHz — 8-bit board standard	16 000 000 Hz	62.5 ns	16 000
48 MHz — USB full-speed PLL	48 000 000 Hz	20.83 ns	48 000
72 MHz — mid-range Cortex-M3	72 000 000 Hz	13.89 ns	72 000
168 MHz — high-end Cortex-M4	168 000 000 Hz	5.95 ns	168 000
240 MHz — wireless SoC turbo	240 000 000 Hz	4.17 ns	240 000

Odd crystal values handled exactly

Serial-friendly parts such as 14.7456 and 18.432 are not round numbers, and rounding them is what puts a UART link out of tolerance. Fractional input is carried straight through to the full hertz count.

Sub-megahertz parts in the same dropdown

The searchable unit lists on both sides reach down to kilohertz and up to gigahertz, so a 32.768 kHz timekeeping crystal and a 240 MHz application core can be compared without leaving the page.

Clean digits for a clock macro

Copying a result gives an unformatted integer with no thousands separators, ready to drop beside a clock definition or a divider constant without hand-editing the string.

Clock and Crystal Questions From Firmware Bring-Up

How long is a single timer tick on a 16 MHz clock?

With the timer fed directly from the core clock, one tick is 62.5 ns — the reciprocal of 16 000 000. That sets the finest interval you can resolve and also the longest one a 16-bit counter reaches before rolling over: 65 536 ticks × 62.5 ns is about 4.1 ms. Anything beyond that needs a prescaler, a 32-bit timer, or a software counter accumulating overflows.

What prescaler and reload value produce a 1 ms interrupt at 16 MHz?

Start from 16 000 000 Hz and pick a prescaler that lands on a convenient tick rate. Divide-by-16 gives a 1 000 000 Hz timer clock — one tick per microsecond — so 1 000 ticks make a millisecond. Where the prescaler and reload registers are written as "value minus one", that becomes a prescaler field of 15 and a reload field of 999; an off-by-one here shows up as a tick running a fraction of a percent fast, dragging every timeout with it.

How many hertz does a ±20 ppm crystal tolerance represent?

Parts per million is a fraction of the nominal count, so 20 ppm of 16 000 000 Hz is 320 Hz either side. Expressed as time rather than frequency, the same 20 ppm is 1.73 s of error per day, or roughly 10.5 minutes across a year. That is irrelevant for a debounce delay, comfortably inside a serial link's budget, and unacceptable for a calendar expected to hold the date through a long deployment.

Why do real-time clocks use a 32.768 kHz crystal rather than a megahertz part?

32 768 is 2¹⁵, so fifteen binary divider stages reduce it to exactly one pulse per second with no remainder and no correction logic. In the unit this page starts from that crystal is 0.032768 MHz — hundreds of times slower than a core clock, which is the point: a tuning-fork resonator at that rate draws a tiny fraction of the current a megahertz oscillator needs, so the calendar keeps counting from a coin cell while the chip sleeps.

Why do serial-heavy boards fit a 14.7456 MHz crystal?

Because baud generators divide by whole numbers, and the leftover becomes timing error. On a classic 8-bit part sampling at 16× the bit rate, 16 000 000 Hz asks for a divisor of 8.68 to reach 115 200 baud; rounding to 9 yields 111 111 baud, about 3.5 % fast — enough to sample the later bits of a frame in the wrong place. Feed the same peripheral 14 745 600 Hz and the divisor lands on exactly 8, with no error at all. Slower rates forgive more: 9 600 baud from a 16 MHz clock comes out within 0.16 %.