GHz to Hz: CPU Clock Speeds and Cycle Time in Picoseconds

Counting the Cycles Behind a Processor's GHz Number

Every CPU and GPU is sold on a single headline figure, almost always a decimal with one digit after the point. That number is a count shortened a billion times over: a chip advertised at 5 GHz is issuing five thousand million clock edges every second, and the interesting questions only start once you write the count out and take its reciprocal. Enter the clock from a product page, a monitoring overlay or a tuning utility and you get the cycles-per-second figure that cycle time and throughput comparisons are built on.

Conversion factor: multiply gigahertz by 1 000 000 000. A 5.0 GHz boost clock is 5.0 × 1 000 000 000 = 5 000 000 000 Hz, which makes one cycle 1 ÷ 5 000 000 000 = 0.2 ns — 200 picoseconds.

What the headline number does and does not say

A boost figure is a ceiling, not a promise

The larger of the two numbers on the box is the peak a chip may reach on a favourable core when power and cooling allow. It is a limit the silicon is permitted to touch, not a rate it is guaranteed to hold under a sustained all-core load.

Latency lives in the reciprocal

Cache hits, branch penalties and pipeline depths are all quoted in cycles. Multiplying those cycle counts by the length of one cycle is the only way to turn an architecture diagram into an actual wait measured in nanoseconds.

Clock is one term in a product of three

Useful work per second is roughly work done per cycle, multiplied by cycles per second, multiplied by the cores you can keep busy. Two chips at the same gigahertz figure can differ substantially once the other two terms are counted.

Getting From a Product-Page Clock to a Cycle Time

Type the clock you actually want to reason about

Enter the base figure for sustained load, or the boost figure when chasing single-thread response. Decimal clocks such as 5.7 accept either a dot or a comma.

Divide one by the result for cycle time

The cycles-per-second figure inverts directly into the length of a single cycle. At 4 000 000 000 Hz that is 250 ps; multiply by a documented cycle penalty to see what a cache miss really costs in time.

Compare base against boost without retyping

Both fields stay editable and the swap control reverses the direction, so a raw hertz reading from a monitoring tool can be pushed back into a gigahertz label and checked against the bin the part was sold under.

Move a side to MHz for memory and fabric clocks

Memory bus clocks and fabric rates are usually printed in megahertz. Searching the unit list on one side rebases that column, so a 3 000 MHz bus and a 3 GHz core clock read as the same count.

Above ten gigahertz the format changes: results of 10 000 000 000 and higher are printed in scientific notation, so a hypothetical 12 GHz entry appears as 1.200000e+10. Every shipping consumer clock sits below that point and prints as full digits.

Clock Speeds and Cycle Times Across Consumer Silicon

The middle column is what the headline figure expands to, and the third is the number that matters when you are reading a latency chart. Notice how quickly the gains shrink: going from 4 to 5 GHz saves 50 ps per cycle, while 5 to 6 GHz saves only 33 ps.

Advertised clock	Clock edges per second	Cycle length	Where you see it
1.0 GHz	1 000 000 000 Hz	1 000 ps	Idle efficiency cores and integrated-graphics floors
1.8 GHz	1 800 000 000 Hz	555.6 ps	Base clock of a thin-and-light mobile part
2.4 GHz	2 400 000 000 Hz	416.7 ps	Base clock on a mid-range discrete graphics card
3.0 GHz	3 000 000 000 Hz	333.3 ps	Mainstream desktop base clock
3.5 GHz	3 500 000 000 Hz	285.7 ps	Sustained all-core rate on a well-cooled desktop
4.0 GHz	4 000 000 000 Hz	250 ps	Common all-core figure under a heavy rendering load
4.5 GHz	4 500 000 000 Hz	222.2 ps	Boost ceiling of a current high-end graphics card
5.0 GHz	5 000 000 000 Hz	200 ps	Single-core boost on a modern desktop processor
5.7 GHz	5 700 000 000 Hz	175.4 ps	Upper boost bin on an enthusiast part
6.0 GHz	6 000 000 000 Hz	166.7 ps	Factory-selected top bin or a well-tuned overclock

Fractional bins land on exact counts

Boost tables step in fiftieths of a gigahertz, and 5.65 has to expand to 5 650 000 000 rather than a rounded five-and-a-half. Decimal input is carried through in full.

Memory clocks reachable from the same field

Because the searchable lists cover megahertz as well, a memory bus figure and a core clock can be lined up as plain counts instead of two prefixes that look unrelated.

Bare counts for a spreadsheet comparison

Copying a field yields digits with no unit and no separators, so a shortlist of parts can be pasted into a sheet and sorted without stripping formatting first.

Clock Speed Questions From Builders and Overclockers

How long is one clock cycle on a 5 GHz processor?

Exactly 200 picoseconds — one divided by 5 000 000 000. That is a genuinely tiny window: light itself covers about 6 cm in vacuum during it, and a signal travelling along a circuit-board trace manages roughly half that. It explains why physical layout matters so much at these rates, and why a documented penalty of, say, 40 cycles for a cache miss works out at about 8 ns of real waiting.

What separates a base clock from a boost clock?

The base figure is the rate the manufacturer commits to holding across all cores within the part's rated power envelope. The boost figure is opportunistic: firmware raises individual cores towards it whenever temperature, current and power headroom permit, and drops them the moment any budget runs out. A lightly threaded task may sit near the boost number; a full render settles between the two, and where it settles is decided by your cooler far more than by the box.

Why did clock speeds stall around 5 GHz instead of continuing to climb?

Switching power rises with frequency and with the square of the voltage, and holding a higher frequency stable normally demands more voltage — so the heat produced grows far faster than the clock does. For decades shrinking transistors offset this, but that scaling relationship broke down in the mid-2000s and power density stopped falling with each node. Designers hit a thermal wall, and the industry redirected its transistor budget into more cores, wider execution and larger caches rather than raw cycles per second.

Why is memory advertised in MT/s when it used to be quoted in MHz?

Because the two numbers stopped matching. Double data rate memory moves data on both the rising and the falling edge of its bus clock, so a kit labelled 6 000 MT/s runs a bus at 3 000 MHz — 3 000 000 000 Hz, the same count as a 3 GHz core clock. Transfers per second is simply the honest name for what is being sold, and using it removes the long-standing confusion of a module marked with a frequency its bus never actually reaches.

Does a higher gigahertz figure always win?

Only when everything else is held equal — same architecture, same core count, same memory. Across different designs the comparison collapses, because a newer core retires noticeably more work per cycle than an older one at the same rate. Clock speed remains a fair tie-breaker within one family and the most useful single number for latency-sensitive work, but alone it predicts far less than the marketing suggests.